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RM0008
Controller area network (bxCAN)
Figure 193. Dual CAN block diagram (connectivity devices)
CAN1 (Ma s ter) with 512 byte s S RAM
M as ter Control
M as ter
Tx M a il b oxe s
1
M a il b ox 0
2
M a s t e r
Receive FIFO 0
2
1
M a il b ox 0
M a s t e r
Receive FIFO 1
2
1
M a il b ox 0
M as ter S t a t us
Tx S t a t us
Rx FIFO 0 S t a t us
Tr a n s mi ss ion
S ched u ler
Rx FIFO 1 S t a t us
2
0
Interr u pt En ab le
Error S t a t us
Bit Timing
CAN 2.0B Active Core
Memory
Acce ss
Controller
Filter
Accept a nce Filter s
3
1
..
.. 26
27
Filter M as ter
Filter Mode
M as ter Filter s
(0 to n)
S l a ve Filter s
(n to 27)
Filter S c a le
Filter FIFO A ss ign
Tr a n s mi ss ion
S ched u ler
S l a ve
Tx M a il b oxe s
S l a ve
Receive FIFO 0
2
S l a ve
Receive FIFO 1
2
Filter Activ a tion
M a il b ox 0
1
2
M a il b ox 0
1
M a il b ox 0
1
CAN2 ( S lave)
M as ter Control
M as ter S t a t us
Tx S t a t us
Rx FIFO 0 S t a t us
Rx FIFO 1 S t a t us
Interr u pt En ab le
Error S t a t us
Bit Timing
CAN 2.0B Active Core
Note: CAN 2 s t a rt filter ba nk n u m b er n i s config u r ab le b y writing to
the CAN2 S B[5:0] b it s in the CAN_ FMR regi s ter.
a i16094
22.4
bxCAN operating modes
bxCAN has three main operating modes: initialization , normal and Sleep . After a
hardware reset, bxCAN is in Sleep mode to reduce power consumption and an internal pull-
up is active on CANTX. The software requests bxCAN to enter initialization or Sleep mode
by setting the INRQ or SLEEP bits in the CAN_MCR register. Once the mode has been
entered, bxCAN confirms it by setting the INAK or SLAK bits in the CAN_MSR register and
the internal pull-up is disabled. When neither INAK nor SLAK are set, bxCAN is in normal
mode. Before entering normal mode bxCAN always has to synchronize on the CAN bus.
Doc ID 13902 Rev 9
545/995
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